A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters

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dc.contributorUniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicantees_ES
dc.contributor.authorMedina-Valdés, Luis-
dc.contributor.authorDiez-Ochoa, Miguel-
dc.contributor.authorCorreal, Raul-
dc.contributor.authorCuenca-Asensi, Sergio-
dc.contributor.authorSerrano-Cases, Alejandro-
dc.contributor.authorGodoy, Jorge-
dc.contributor.authorMartínez-Álvarez, Antonio-
dc.contributor.authorVillagrá, Jorge-
dc.contributor.otherUniversidad de Alicante. Departamento de Tecnología Informática y Computaciónes_ES
dc.contributor.otherUniversidad de Alicante. Instituto Universitario de Investigación Informáticaes_ES
dc.date.accessioned2017-11-16T07:58:55Z-
dc.date.available2017-11-16T07:58:55Z-
dc.date.issued2017-11-11-
dc.identifier.citationMedina L, Diez-Ochoa M, Correal R, Cuenca-Asensi S, Serrano A, Godoy J, Martínez-Álvarez A, Villagra J. A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters. Sensors. 2017; 17(11):2599. doi:10.3390/s17112599es_ES
dc.identifier.issn1424-8220-
dc.identifier.urihttp://hdl.handle.net/10045/71269-
dc.description.abstractGrid-based perception techniques in the automotive sector based on fusing information from different sensors and their robust perceptions of the environment are proliferating in the industry. However, one of the main drawbacks of these techniques is the traditionally prohibitive, high computing performance that is required for embedded automotive systems. In this work, the capabilities of new computing architectures that embed these algorithms are assessed in a real car. The paper compares two ad hoc optimized designs of the Bayesian Occupancy Filter; one for General Purpose Graphics Processing Unit (GPGPU) and the other for Field-Programmable Gate Array (FPGA). The resulting implementations are compared in terms of development effort, accuracy and performance, using datasets from a realistic simulator and from a real automated vehicle.es_ES
dc.description.sponsorshipThis work has been partially funded by the Spanish Ministry of Economy and Competitiveness with the National Projects TCAP-AUTO (RTC-2015-3942-4) and NAVEGASE (DPI2014-53525-C3-1-R).es_ES
dc.languageenges_ES
dc.publisherMDPIes_ES
dc.rights© 2017 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/)es_ES
dc.subjectBayesian occupancy filteres_ES
dc.subjectFPGAes_ES
dc.subjectGPGPUes_ES
dc.subjectEmbedded systemes_ES
dc.subjectADASes_ES
dc.subject.otherArquitectura y Tecnología de Computadoreses_ES
dc.titleA Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filterses_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.peerreviewedsies_ES
dc.identifier.doi10.3390/s17112599-
dc.relation.publisherversionhttp://dx.doi.org/10.3390/s17112599es_ES
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/MINECO//DPI2014-53525-C3-1-R-
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