A Hardware-Software Approach for On-Line Soft Error Mitigation in Interrupt-Driven Applications
Por favor, use este identificador para citar o enlazar este ítem:
http://hdl.handle.net/10045/56649
Título: | A Hardware-Software Approach for On-Line Soft Error Mitigation in Interrupt-Driven Applications |
---|---|
Autor/es: | Martínez-Álvarez, Antonio | Restrepo Calle, Felipe | Cuenca-Asensi, Sergio | Reyneri, Leonardo M. | Lindoso, Almudena | Entrena, Luis |
Grupo/s de investigación o GITE: | UniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicante |
Centro, Departamento o Servicio: | Universidad de Alicante. Departamento de Tecnología Informática y Computación |
Palabras clave: | Single Event Upset (SEU) | Single Event Transient (SET) | Fault tolerance | Soft error mitigation | Radiation effects |
Área/s de conocimiento: | Arquitectura y Tecnología de Computadores |
Fecha de publicación: | 13-jul-2016 |
Editor: | IEEE |
Cita bibliográfica: | IEEE Transactions on Dependable and Secure Computing. 2016, 13(4): 502-508. doi:10.1109/TDSC.2014.2382593 |
Resumen: | Integrity assurance of configuration data has a significant impact on microcontroller-based systems reliability. This is especially true when running applications driven by events which behavior is tightly coupled to this kind of data. This work proposes a new hybrid technique that combines hardware and software resources for detecting and recovering soft-errors in system configuration data. Our approach is based on the utilization of a common built-in microcontroller resource (timer) that works jointly with a software-based technique, which is responsible to periodically refresh the configuration data. The experiments demonstrate that non-destructive single event effects can be effectively mitigated with reduced overheads. Results show an important increase in fault coverage for SEUs and SETs, about one order of magnitude. |
Patrocinador/es: | This work was funded in part by the Spanish Ministry of Education, Culture and Sports with the project “Developing hybrid fault tolerance techniques for embedded microprocessors” (PHB2012–0158-PC). |
URI: | http://hdl.handle.net/10045/56649 |
ISSN: | 1545-5971 | 1941-0018 (Online) |
DOI: | 10.1109/TDSC.2014.2382593 |
Idioma: | eng |
Tipo: | info:eu-repo/semantics/article |
Derechos: | © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works. |
Revisión científica: | si |
Versión del editor: | http://dx.doi.org/10.1109/TDSC.2014.2382593 |
Aparece en las colecciones: | INV - UNICAD - Artículos de Revistas |
Archivos en este ítem:
Archivo | Descripción | Tamaño | Formato | |
---|---|---|---|---|
2016_Martinez-Alvarez_etal_IEEE-TDSC_final.pdf | Versión final (acceso restringido) | 1,19 MB | Adobe PDF | Abrir Solicitar una copia |
2016_Martinez-Alvarez_etal_IEEE-TDSC_rev.pdf | Versión revisada (acceso abierto) | 916,77 kB | Adobe PDF | Abrir Vista previa |
Todos los documentos en RUA están protegidos por derechos de autor. Algunos derechos reservados.