Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture
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http://hdl.handle.net/10045/12112
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Campo DC | Valor | Idioma |
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dc.contributor | UniCAD: Grupo de Investigación en CAD/CAM/CAE de la Universidad de Alicante | en |
dc.contributor.author | Ibarra Picó, Francisco | - |
dc.contributor.author | Cuenca-Asensi, Sergio | - |
dc.contributor.author | Córcoles López, Víctor | - |
dc.contributor.other | Universidad de Alicante. Departamento de Tecnología Informática y Computación | en |
dc.date.accessioned | 2009-10-29T10:11:19Z | - |
dc.date.available | 2009-10-29T10:11:19Z | - |
dc.date.created | 2001 | - |
dc.date.issued | 2001 | - |
dc.identifier.citation | IBARRA PICÓ, Francisco; CUENCA ASENSI, Sergio; CÓRCOLES LÓPEZ, Víctor. "Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture". En: Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. Washington, DC : IEEE Computer Society, 2001. ISBN 0-7695-2667-5, pp. 289-290 | en |
dc.identifier.isbn | 0-7695-2667-5 | - |
dc.identifier.uri | http://hdl.handle.net/10045/12112 | - |
dc.description.abstract | Nowadays, most image processing systems are implemented using either MMX-optimized software libraries or, when time requirements are limited, expensive high performance DSP-based boards. In this paper we present a texture analysis co-processor concept that permits the efficient hardware implementation of statistical feature extraction, and hardware-software codesign to achieve high-performance low-cost solutions. We propose a hybrid architecture based on FPGA chips, for massive data processing, and digital signal processor (DSP) for floating-point computations. In our preliminary trials with test images, we achieved sufficient performance improvements to handle a wide range of real-time applications. | en |
dc.language | eng | en |
dc.publisher | IEEE Computer Society | en |
dc.subject | FPGA | en |
dc.subject | Texture analisys | en |
dc.subject.other | Arquitectura y Tecnología de Computadores | en |
dc.title | Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture | en |
dc.type | info:eu-repo/semantics/bookPart | en |
dc.peerreviewed | si | en |
dc.identifier.doi | 10.1109/FCCM.2001.7 | - |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | - |
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