Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture

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Title: Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture
Authors: Ibarra Picó, Francisco | Cuenca-Asensi, Sergio | Córcoles López, Víctor
Research Group/s: UniCAD: Grupo de Investigación en CAD/CAM/CAE de la Universidad de Alicante
Center, Department or Service: Universidad de Alicante. Departamento de Tecnología Informática y Computación
Keywords: FPGA | Texture analisys
Knowledge Area: Arquitectura y Tecnología de Computadores
Date Created: 2001
Issue Date: 2001
Publisher: IEEE Computer Society
Citation: IBARRA PICÓ, Francisco; CUENCA ASENSI, Sergio; CÓRCOLES LÓPEZ, Víctor. "Accelerating statistical texture analysis with an FPGA-DSP hybrid architecture". En: Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. Washington, DC : IEEE Computer Society, 2001. ISBN 0-7695-2667-5, pp. 289-290
Abstract: Nowadays, most image processing systems are implemented using either MMX-optimized software libraries or, when time requirements are limited, expensive high performance DSP-based boards. In this paper we present a texture analysis co-processor concept that permits the efficient hardware implementation of statistical feature extraction, and hardware-software codesign to achieve high-performance low-cost solutions. We propose a hybrid architecture based on FPGA chips, for massive data processing, and digital signal processor (DSP) for floating-point computations. In our preliminary trials with test images, we achieved sufficient performance improvements to handle a wide range of real-time applications.
ISBN: 0-7695-2667-5
DOI: 10.1109/FCCM.2001.7
Language: eng
Type: info:eu-repo/semantics/bookPart
Peer Review: si
Appears in Collections:INV - UNICAD - Comunicaciones a Congresos, Conferencias, etc.
INV - TIA-SL - Comunicaciones a Congresos, Conferencias, etc.

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