An Electronic Reconfigurable Neural Architecture for Intrusion Detection

Please use this identifier to cite or link to this item: http://hdl.handle.net/10045/50106
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Title: An Electronic Reconfigurable Neural Architecture for Intrusion Detection
Authors: Ibarra Picó, Francisco | Grediaga, Angel | García Crespi, Federico | Camara, A.
Research Group/s: Tecnología Informática Avanzada - Seguridad Legal | Ingeniería Web, Aplicaciones y Desarrollos (IWAD)
Center, Department or Service: Universidad de Alicante. Departamento de Tecnología Informática y Computación
Keywords: Electronic | Reconfigurable | Neural | Intrusion detection
Knowledge Area: Arquitectura y Tecnología de Computadores
Issue Date: 2005
Publisher: Springer Berlin Heidelberg
Citation: Artificial Intelligence and Knowledge Engineering Applications: A Bioinspired Approach: First International Work-Conference on the Interplay Between Natural and Artificial Computation, IWINAC 2005, Las Palmas, Canary Islands, Spain, June 15-18, 2005, Proceedings, Part II. Berlin : Springer, 2005. (Lecture Notes in Computer Science; 3562). ISBN 978-3-540-26319-7, pp. 376-384
Abstract: The explosive growth of the traffic in computer systems has made it clear that traditional control techniques are not adequate to provide the system users fast access to network resources and prevent unfair uses. In this paper, we present a reconfigurable digital hardware implementation of a specific neural model for intrusion detection. It uses a specific vector of characterization of the network packages (intrusion vector) which is starting from information obtained during the access intent. This vector will be treated by the system. Our approach is adaptative and to detecting these intrusions by using a complex artificial intelligence method known as multilayer perceptron. The implementation have been developed and tested into a reconfigurable hardware (FPGA) for embedded systems. Finally, the Intrusion detection system was tested in a real-world simulation to gauge its effectiveness and real-time response.
Sponsor: The work has been supported by CICYT TIC2001-2004 Diseño de una arquitectura reconfigurable para algoritmos.
URI: http://hdl.handle.net/10045/50106
ISBN: 978-3-540-26319-7
ISSN: 0302-9743 (Print) | 1611-3349 (Online)
DOI: 10.1007/11499305_39
Language: eng
Type: info:eu-repo/semantics/article
Rights: © Springer-Verlag Berlin Heidelberg 2005. The original publication is available at www.springerlink.com
Peer Review: si
Publisher version: http://dx.doi.org/10.1007/11499305_39
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